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 19-2962; Rev 1; 10/03
KIT ATION EVALU BLE AVAILA
5-Output Power-Management IC For Low-Cost PDAs
General Description Features
o Minimal External Components o 3.3V, 500mA MAIN LDO o 3.3V, 400mA SD Card Output o 1V, 250mA Core LDO o 1.8V, 30mA Second Core LDO o High-Efficiency LCD Boost o LCD 0V True Shutdown when Off o 50A Quiescent Current o 3.1V to 5.5V Input Range
MAX1559
The MAX1559 is a complete power-management chip for low-cost personal digital assistants (PDAs) and portable devices operating from a 1-cell lithium-ion (Li+) or 3-cell NiMH battery. It includes all the regulators, outputs, and voltage monitors necessary for small PDAs while requiring a bare minimum of external components. Featured are four linear regulators, a DC-DC boost converter for LCD bias, a microprocessor reset output, and low-battery shutdown in a miniature QFN package. For a compatible Li+ charger for both USB and AC adapter inputs, refer to the MAX1551*. The four linear regulators feature PMOS pass elements for efficient low-dropout operation. A MAIN LDO supplies 3.3V at 500mA. A signal-detect (SD) card-slot output supplies 3.3V at 400mA. The COR1 LDO outputs 1V at 250mA, and the COR2 LDO supplies 1.8V at 30mA. The SD output and COR2 LDO have pin-controlled shutdown. For other output-voltage combinations, contact Maxim. The DC-DC boost converter features an on-board MOSFET and True ShutdownTM when off. This means that during shutdown, input power is disconnected from the inductor so that the boost output falls to 0V rather than remaining one diode drop below the input voltage. A P reset output clears when the MAIN LDO achieves regulation to ensure an orderly start. Thermal shutdown protects the die from overheating. The MAX1559 operates from a 3.1V to 5.5V supply and consumes 50mA of no-load supply current. It is packaged in a 1.3W, 16-pin thin QFN with a power pad on the underside of the package. The MAX1559 is specified for operation from -40C to +85C.
Ordering Information
PART MAX1559ETE TEMP RANGE -40C to +85C PIN-PACKAGE 16 Thin QFN
Typical Operating Circuit
INPUT 3.1V TO 5.5V IN SWIN SDIG MAX1559 REF COR1 1.0V, 250mA 3.3V, 400mA MAIN 3.3V, 500mA
Applications
PDAs Organizers Cellular and Cordless Phones MP3 Players Hand-Held Devices
TO MAIN SDIG OFF ON ENSD ENC2 ENLCD COR2 OFF ON LCD OFF ON
COR2
1.8V, 30mA
SW
D1 LX
LCD 20V, 1mA
LFB RESET OUT RS GND
True Shutdown is a trademark of Maxim Integrated Products, Inc. *Protected by U.S. Patent #6,507,172.
Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
5-Output Power-Management IC For Low-Cost PDAs MAX1559
ABSOLUTE MAXIMUM RATINGS
IN, SWIN, ENSD, ENC2, ENLCD, RS, SDIG to GND .........................................................-0.3V to +6V LX to GND ..............................................................-0.3V to +30V MAIN, COR1, COR2, REF, LFB to GND ......-0.3V to (VIN + 0.3V) SWIN to IN .............................................................-0.3V to +0.3V Current into LX or SWIN .............................................300mARMS Current Out of SW ......................................................300mARMS Output Short-Circuit Duration.....................................Continuous Continuous Power Dissipation (TA = +70C) 16-Pin Thin QFN (derate 16.9mW/C above +70C) ...1.349W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER GENERAL IN, SWIN Voltage Range IN Complete Shutdown Threshold IN Restart Threshold IN, SWIN Operating Current--All On IN Operating Current--All On Except LCD IN Operating Current--MAIN and COR1 On IN, SWIN Operating Current--Shut Down REF Output Voltage LDOs MAIN Output Voltage RS Deassert Threshold for MAIN Rising RS Assert Threshold MAIN Falling MAIN Current Limit MAIN Dropout Voltage (0.7 typ) SDIG Output Voltage SDIG Current Limit SDIG Dropout Voltage (0.85 typ) (Note 1) SDIG Reverse Leakage Current COR1 Output Voltage COR1 Current Limit ILOAD = 1mA ILOAD = 200mA ILOAD = 400mA VSDIG = 5V, ENSD = VIN = GND ILOAD = 100A to 200mA, VIN = 3.6V to 5.5V 0.960 250 ILOAD = 1mA ILOAD = 300mA ILOAD = 500mA ILOAD = 100A to 200mA, VIN = 3.6V to 5.5V 3.2175 420 ILOAD = 100A to 300mA, VIN = 3.6V to 5.5V 3.2175 3.093 3.0100 630 3.3 3.173 3.094 900 1 210 350 3.3 630 0.80 170 340 7 1 450 300 600 15 1.025 750 A V mA mV 310 525 3.3825 825 V mA mV 3.3825 3.252 3.1755 1200 V V V mA Operating VIN falling VIN rising VLFB = 1.3V ENLCD = GND ENLCD = ENC2 = ENSD = GND, LDO loads = 0A VSWIN = VIN = 2.9V IREF = 0A to 5A 1.235 3.1 2.95 3.51 3 3.6 100 90 50 2 1.25 5.5 3.05 3.69 125 110 65 10 1.265 V V V A A A A V CONDITIONS MIN TYP MAX UNITS
2
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5-Output Power-Management IC For Low-Cost PDAs
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER COR2 Output Voltage COR2 Current Limit LCD LX Voltage Range LX Current Limit LX On-Resistance LX Leakage Current Maximum LX On-Time Minimum LX Off-Time LFB Feedback Threshold LFB Input Bias Current SW Off Leakage Current SW PMOS On-Resistance SW PMOS Peak Current Limit SW PMOS Ave Current Limit Soft-Start Time LOGIC IN AND OUT EN_ Input Low Level EN_ Input High Level EN_ Input Leakage Current RS, Output Low Level RS, Output High Leakage THERMAL PROTECTION Thermal-Shutdown Temperature Rising temperature +160 C Sinking 1mA, VIN = 2.5V VOUT = 5.5V VIN = 3.1V to 5.5V VIN = 3.1V to 5.5V 1.4 0.01 0.25 1 0.4 1 0.4 V V A V A CSW = 1F VLFB = 1.3V SW = GND, VSWIN = 5.5V, ENLCD = GND VLFB > 1.1V VLFB < 0.8V (soft-start) VLX = 28V 8 0.8 3.9 1.23 11 1 5 1.25 5 0.01 1 700 300 0.13 L1 = 10H 210 250 1.7 2 14 1.2 6.0 1.27 100 1 1.75 28 285 V mA A s s V nA A mA mA ms CONDITIONS ILOAD = 100A to 20mA, VIN = 3.6V to 5.5V MIN 1.755 30 TYP 1.8 50 MAX 1.845 100 UNITS V mA
MAX1559
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3
5-Output Power-Management IC For Low-Cost PDAs MAX1559
ELECTRICAL CHARACTERISTICS
(VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER GENERAL IN, SWIN Voltage Range IN Complete Shutdown Threshold IN Restart Threshold IN, SWIN Operating Current--All On IN Operating Current--All On Except LCD IN Operating Current--MAIN and COR1 On IN, SWIN Operating Current--Shut Down LDOs MAIN Output Voltage RS Deassert Threshold for MAIN Rising RS Assert Threshold MAIN Falling MAIN Current Limit MAIN Dropout Voltage (0.7 typ) (Note 1) SDIG Output Voltage SDIG Current Limit ILOAD = 1mA SDIG Dropout Voltage (0.75 typ) SDIG Reverse Leakage Current COR1 Output Voltage COR1 Current Limit COR2 Output Voltage COR2 Current Limit LCD LX Voltage Range LX Current Limit LX Leakage Current Maximum LX On-Time Minimum LX Off-Time LFB Feedback Threshold VLFB > 1.1V VLFB < 0.8V (soft-start) L1 = 10H VLX = 28V 8 0.8 3.9 1.220 200 28 285 2 14 1.2 6.0 1.270 V mA A s s V ILOAD = 100A to 20mA, VIN = 3.6V to 5.5V ILOAD = 200mA ILOAD = 400mA VSDIG = 5V, ENSD = VIN = GND ILOAD = 100A to 200mA, VIN = 3.6V to 5.5V 0.96 250 1.755 30 ILOAD = 300mA ILOAD = 500mA ILOAD = 100A to 200mA, VIN = 3.6V to 5.5V 3.2175 420 ILOAD = 100A to 300mA, VIN = 3.6V to 5.5V 3.2175 3.093 3.0100 630 3.3825 3.252 3.1755 1200 310 525 3.3825 825 800 300 600 15 1.025 750 1.845 100 A V mA V mA mV V V V mA mV V mA Operating VIN falling VIN rising VLFB = 1.3V ENLCD = GND ENLCD = ENC2 = ENSD = GND, LDO loads = 0A VSWIN = VIN = 2.9V 3.1 2.95 3.51 5.5 3.05 3.69 125 110 65 10 V V V A A A A CONDITIONS MIN MAX UNITS
4
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5-Output Power-Management IC For Low-Cost PDAs
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VSWIN = VENSD = VENC2 = VENLCD = 4.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER LFB Input Bias Current SW Off-Leakage Current LOGIC IN AND OUT EN_ Input Low Level EN_ Input High Level EN_ Input Leakage Current RS, Output Low Level RS, Output High Leakage Sinking 1mA, VIN = 2.5V VOUT = 5.5V VIN = 3.1V to 5.5V VIN = 3.1V to 5.5V 1.4 1 0.4 1 0.4 V V A V A VLFB = 1.3V SW = GND, VSWIN = 5.5V, ENLCD = GND CONDITIONS MIN MAX 100 1 UNITS nA A
MAX1559
Note 1: Specification is guaranteed by design, not production tested. Note 2: Specifications to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
MAIN DROPOUT VOLTAGE vs. LOAD CURRENT
MAX1559 toc01
SDIG DROPOUT VOLTAGE vs. LOAD CURRENT
MAX1559 toc02
MAIN OUTPUT VOLTAGE vs. LOAD CURRENT
3.25 OUTPUT VOLTAGE (V) 3.00 2.75 2.50 2.25 2.00
MAX1559 toc03
500
300 250 DROPOUT VOLTAGE (mV) 200 150 100 50 0
3.50
DROPOUT VOLTAGE (mV)
400
300
200
100
1.75 1.50 0 50 100 150 ILOAD (mA) 200 250 300 0 100 200 300 400 500 600 700 800 900 ILOAD (mA)
0 0 100 200 300 ILOAD (mA) 400 500 600
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5
5-Output Power-Management IC For Low-Cost PDAs MAX1559
Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
SDIG OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1559 toc04
COR1 OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1559 toc05
COR2 OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1559 toc06
3.50 3.25 OUTPUT VOLTAGE (V) 3.00 2.75 2.50 2.25 2.00 1.75 1.50 0 100 200 300 400 500 600 ILOAD (mA)
1.2
2.00 1.75 OUTPUT VOLTAGE (V) 1.50 1.25 1.00 0.75
OUTPUT VOLTAGE (V)
1.0
0.8
0.6
0.4 0 100 200 ILOAD (mA) 300 400
0.50 0 10 20 30 ILOAD (mA) 40 50
LOAD STEP RESPONSE (MAIN)
MAX1559 toc07
LOAD STEP RESPONSE (COR1)
MAX1559 toc08
0V
VMAIN AC-COUPLED 50mV/div
0V
VCOR1 AC-COUPLED 20mV/div
0A
ILOAD 100mA/div 40s/div
0A
ILOAD 100mA/div 40s/div
INPUT CURRENT vs. INPUT VOLTAGE
VIN FALLING 100 VIN RISING
MAX1559 toc09
LCD SWITCH WAVEFORM
MAX1559 toc10
125
0V
VIN AC-COUPLED 20mV/div
IIN (A)
75 0V LX 10V/div
50
25 0V 0 0 1 2 3 VIN (V) 4 5 2s/div
LCD AC-COUPLED 20mV/div
6
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5-Output Power-Management IC For Low-Cost PDAs
Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
MAX1559
ENABLE RESPONSE TO ENSD
MAX1559 toc11
ENABLE RESPONSE TO LCD
MAX1559 toc12
LCD EFFICIENCY vs. LOAD CURRENT
MAX1559 toc13
85 ENSD 5V/div
RL = 30 CL = 47F
80 EFFICIENCY (%) VLCD = 18V 75 VLCD = 15V
0V
ENSD 2V/div
0V LCD BOOST SOFT-START SW TURN-ON
LCD 2V/div
70
0V
SDIG 1V/div 200s/div
65 0V 60 400s/div 0 1 2 3 4 5 ILOAD (mA)
LCD OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1559 toc14
LCD OUTPUT VOLTAGE vs. INPUT VOLTAGE
18.75 OUTPUT VOLTAGE (V) 18.50 18.25 18.00 17.75 17.50 17.25 17.00 0V 3.5 4.0 4.5 VIN (V) 5.0 5.5 0V 0V
MAX1559 toc15
POWER-ON TIMING FOR 3.3V MAIN AND RESET SIGNAL
MAX1559 toc16
19.00 18.75 OUTPUT VOLTAGE (V) 18.50 18.25 18.00 17.75 17.50 17.25 17.00 0 1 2 IIN (mA) 3 4 5
19.00
4V 2.6V 3.3V MAIN ACTIVATED WHEN VIN RISES TO 3.6V
VIN 1V/div MAIN 1V/div
COR1 1V/div RS 1V/div RS EXTERNAL RC SET FOR 10ms DELAY FROM 1V GOOD 10ms/div
POWER-ON TIMING FOR 3.3V MAIN AND 1V CORE
MAX1559 toc17
3.6V
VIN 1V/div MAIN 1V/div
POWER-OFF TIMING FOR 3.3V MAIN, 1V CORE, AND RESET SIGNAL
MAX1559 toc18
4V 3.3V COR1 DEACTIVATED AND RS LOW WHEN MAIN FALLS TO 3V VIN 1V/div
0V
COR1 NOT ACTIVATED UNTIL 3.3V IN REGULATION COR1 1V/div
3.3V MAIN DEACTIVATED WHEN VIN FALLS TO 3V
1V 2.4V
MAIN 1V/div COR1 1V/div RS 1V/div 4ms/div
0V RS 1V/div 200s/div
0V
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7
5-Output Power-Management IC For Low-Cost PDAs MAX1559
Pin Description
PIN 1 2 3 COR1 IN SDIG FUNCTION 1V, 250mA LDO Output for CPU Core. COR1 turns off when VIN < 3V or MAIN < 3.1V. Input Voltage to the Device. Bypass to GND with a 1F capacitor. 3.3V, 400mA LDO Output for Secure Digital Card Slot. SDIG has reverse current protection so SDIG can be biased when no power is present at IN. SDIG output turns off when VIN < 3V or when ENSD goes low. SDIG Enable Input. Drive ENSD low to turn off SDIG and high to turn on. SDIG cannot be activated when VIN < 3V. 1.25V Reference. Bypass with 0.1F to GND. Reset Output. RS is an active-low, open-drain output that goes low when VMAIN falls below 3.1V. RS deasserts when VMAIN goes above 3.2V. Connect a 1M pullup resistor from RS to MAIN. Not Connected Ground LCD Boost Switch. Connect to a boost inductor and Schottky diode. See Figure 1. LCD True Shutdown Switch Output. SW is the power source for the boost inductor. SW turns on when ENLCD is high. For best efficiency, bypass SW with 4.7F to GND. LCD True Shutdown Switch Input. The SWIN-to-SW switch turns off when ENLCD goes low or when VIN < 3V. Connect SWIN to IN. LCD Feedback Input. Connect LFB to a resistor-divider network between the LCD output and GND. The feedback threshold is 1.25V. Enable Input for LCD (Boost Regulator). Drive ENLCD high to activate the LCD boost. Drive ENLCD low to shut down the LCD output. The LCD cannot be activated when VIN < 3V. Enable Input for Secondary Core LDO (COR2). Drive ENC2 high to turn on COR2 and low to turn off. COR2 cannot be activated when VIN < 3V. 1.8V, 30mA LDO Output for Secondary Core. COR2 turns off when VIN < 3V or when ENC2 goes low. 3.3V, 500mA LDO Output for Main Supply. MAIN output turns off when VIN < 3V.
4 5 6 7 8 9 10 11 12 13 14 15 16
ENSD REF RS N.C. GND LX SW SWIN LFB ENLCD ENC2 COR2 MAIN
Detailed Description
Linear Regulators
The MAX1559 contains all power blocks and voltage monitors for a small PDA. Power for logic and other subsystems are provided by four LDOs: * MAIN--Provides 3.3V at a guaranteed 500mA with a typical current limit of 900mA. * SDIG--Provides 3.3V at a guaranteed 400mA for secure digital cards with a typical current limit of 630mA.
* COR1--1V for CPU core guarantees 250mA and a typical current limit of 450mA. * COR2--1.8V for CODEC core guarantees 30mA and a typical current limit of 50mA. Note that it may not be possible to draw the rated current of MAIN and SDIG at all operating input voltages due to the dropout limitations of those regulators. The typical dropout resistance of the MAIN regulator is 0.7 (350mV drop at 500mA), and the typical dropout resistance of the SDIG regulator is 0.85 (340mV drop at 400mA).
8
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5-Output Power-Management IC For Low-Cost PDAs
MAIN and COR1 regulators are always on as long as the IC is not in low-voltage shutdown (VIN < 3V). COR2 and SDIG can be turned on and off independently by logic signals at ENC2 and ENSD, respectively, but cannot be activated if VIN < 3V. When SDIG is turned off, reverse current is blocked so the SDIG output can be biased with an external source when no power is present at IN. Leakage current is typically 3A with 3.3V at SDIG. ESR and are commonly available in values up to 10F. X7R and X5R dielectrics are recommended. Note that some ceramic dielectrics, such as Z5U and Y5V, exhibit large capacitance and ESR variation with temperature and require larger than the recommended values to maintain stability over temperature.
MAX1559
LCD Boost Output
Selecting an Inductor The LCD boost is designed to operate with a wide range of inductor values (4.7H to 22H). Smaller inductance values typically offer smaller size for a given series resistance or saturation current. Smaller values make LX switch more frequently for a given load and can reduce efficiency at low load currents. Larger values reduce switching losses due to less frequent switching for a given load, but higher resistance can then reduce efficiency. A 10H inductor provides a good balance and works well for most applications. The inductor's saturation current rating should be greater than the peak switching current (250mA); however, it is generally acceptable to bias some inductors into saturation by as much as 20%, although this slightly reduces efficiency. Selecting a Diode Schottky diodes rated at 250mA or more, such as the Motorola MBRS0530 or Nihon EP05Q03L are recommended. The diode reverse-breakdown voltage rating must be greater than the LCD output voltage. Selecting Capacitors For most applications, use a small 1F LCD output capacitor. This typically provides a peak-to-peak output ripple of 30mV. In addition, bypass IN with 1F and SW with 4.7F ceramic capacitors. An LCD feed-forward capacitor, connected from the output to FB, improves stability over a wide range of battery voltages. A 10pF capacitor is sufficient for most applications; however, this value is also affected by PC board layout. Setting the LCD Voltage Adjust the output voltage by connecting a voltagedivider from the output (VOUT) to FB (Figure 1). Select R2 between 10k and 200k. Calculate R1 with the following equation: R1 = R2 [(VOUT / VFB) - 1] where VFB = 1.25V and VOUT can range from VIN to 28V. The input bias current of FB is typically only 5nA, which allows large-value resistors to be used. For less
LCD DC-DC Boost
In addition to the LDOs, the MAX1559 also includes a low-current, high-voltage DC-DC boost converter for LCD bias. This circuit can output at up to 28V and can be adjusted with either an analog or PWM control signal using external components. SW provides an input-power disconnect for the LCD when ENLCD is low (off). The input-power disconnect function is ideal for applications that require the output voltage to fall to 0V in shutdown (True Shutdown). If True Shutdown is not required, the SW switch can be bypassed by connecting the boost inductor directly to IN and removing the bypass cap on SW (C9 in Figure 1).
System Sleep
All regulated outputs turn off when VIN falls below 3V. The MAX1559 resumes normal operation when V IN rises above 3.6V.
Reset Output
Reset (RS) asserts when VMAIN falls below 3.094V. RS is an open-drain, active-low output. Connect a 1M resistor from RS to MAIN. To implement a reset deassertion delay, add a capacitor from RS to GND. An approximate 10ms delay can be generated with 1M and 22nF. This results in a 22ms time constant, but assumes the input threshold of the CPU reset input is approximately 1V and is reached approximately 10ms after RS goes high impedance. Timing for RS, 3.3V MAIN, and 1V COR1 is shown in Figure 3.
Applications Information
LDO Output Capacitors (MAIN, SDIG, COR1, and COR2)
Capacitors are required at each output of the MAX1559 for stable operation over the full load and temperature range. See Figure 1 for recommended capacitor values for each output. To reduce noise and improve load transients, large output capacitors at up to 10F can be used. Surface-mount ceramic capacitors have very low
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9
5-Output Power-Management IC For Low-Cost PDAs MAX1559
AC ADAPTER INPUT 3.5V TO 7V DC 1F USB INPUT 3.5V TO 6.0V USB 1F POK LOW WHEN EITHER USB OR DC IS ABOVE UV AND ABOVE BATT PG
MAX1551
BATT 1F C1 1F TO MAIN
IN SWIN
MAX1559
MAIN C2 4.7F SD
3.3V, 500mA MAIN POWER
3.3V, 400mA C3 SD CARD SLOT 4.7F 1V, 250mA CPU CORE 1 C4 4.7F C5 1F 1.8V, 30mA CORE 2
COR1 POWER PRESENT (EITHER DC OR USB) ENSD GND OFF ON ENC2 ENLCD LX TO MAIN R3 1M RESET OUT C9 22nF RS LCD BOOST LFB REF REF C10 0.1F GND LCD OFF SWITCH
COR2
SW L1 10H MURATA LQH3C C6 4.7F
R1 1.5M
C8 47pF
LCD 15V C7 1F
R2 100k
CONNECTION FOR PWM-CONTROLLED LCD BIAS
Figure 1. Typical Operating Circuit with Charger and External PWM LCD Control
than 1% error, the current through R2 should be greater than 100 times the feedback input bias current (IFB). LCD Adjustment The LCD boost output can be digitally adjusted by either a DAC or PWM signal. DAC Adjustment Adding a DAC and a resistor, RD, to the divider-circuit (Figure 4) provides DAC adjustment of VOUT. Ensure that VOUT(MAX) does not exceed the LCD panel rating. The output voltage (VOUT) as a function of the DAC
voltage (VDOUT) can be calculated using the following formula: R (V - VDOUT )R1 VOUT = VREF 1 + 1 + REF R2 RD Using a PWM Signal Many microprocessors have the ability to create PWM outputs. These are digital outputs, based on either 16-bit or 8-bit counters, with a programmable duty cycle. In many applications, they are suitable for adjusting the output of the MAX1559 as seen in Figure 1.
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5-Output Power-Management IC For Low-Cost PDAs MAX1559
MAX1559 IN SWIN LDO CONTROL MAIN 3.3V, 500mA
RS REF
RESET OUTPUT
LDO CONTROL
COR1
1V, 250mA
ENSD
LDO CONTROL
SDIG
3.3V, 400mA
OFF
ON
ENC2
LDO CONTROL LCD OFF SWITCH
COR2
1.8V, 30mA
ENLCD
SW
LX LCD BOOST LFB BIAS CURRENT GND THSD
LCD 20V 1mA
REF
REF
Figure 2. Functional Diagram
The circuit consists of the PWM source, capacitor C10, and resistors RD and RW. To analyze the transfer function of the PWM circuit, it is easiest to first simplify it to its Thevenin equivalent. The Thevenin voltage can be calculated using the following formula: VTHEV = (D VOH) + (1 - D) VOL
where D is the duty cycle of the PWM signal, VOH is the PWM output high level (often 3.3V), and V OL is the PWM output low level (usually 0V). For CMOS logic, this equation simplifies to: VTHEV = D VDD
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11
5-Output Power-Management IC For Low-Cost PDAs MAX1559
where VDD is the I/O voltage of the PWM output. The Thevenin impedance is the sum of resistors RW and RD: RTHEV = RD+ RW The output voltage (VOUT) as a function of the PWM average voltage (VTHEV) is: R (V - VTHEV ) x R1 VOUT = VREF x 1+ 1 + REF RTHEV R2 When using the PWM adjustment method, RD isolates the capacitor from the feedback loop of the MAX1559. The cutoff frequency of the lowpass filter is defined as: 1 fC = 2 x x RTHEV The cutoff frequency should be at least 2 decades below the PWM frequency to minimize the induced AC ripple at the output. An important consideration is the turn-on transient created by the initial charge on the filter capacitor C10. This capacitor forms a time constant with RTHEV, which causes the output to initialize at a higher than intended voltage. This overshoot can be minimized by scaling R D as high as possible compared to R1 and R2. Alternately, the P can briefly keep the LCD disabled until the PWM voltage has had time to stabilize.
3.3V ACTIVATED WHEN VIN RISES TO 3.6V
VIN
3.3V DEACTIVATED WHEN VIN FALLS TO 3.0V
3.3V MAIN
COR1 NOT ACTIVATED UNTIL 3.3V IN REGULATION COR1 DEACTIVATED AND RS LOW WHEN MAIN FALLS TO 3V
1V COR1
RS OUTPUT RS EXTERNAL RC SET FOR 10ms DELAY FROM 1V GOOD
Figure 3. RS and Power-On, Power-Off Timing for 3.3V and 1V Core
Thermal Considerations
In most applications, the circuit is located on a multilayer board and full use of the four or more layers is recommended. For heat dissipation, connect the exposed backside pad of the QFN package to a large analog ground plane, preferably on a surface of the board that receives good airflow. Typical applications use multiple ground planes to minimize thermal resistance. Avoid large AC currents through the analog ground plane.
PC Board Layout and Grounding
Careful PC board layout is important for minimizing ground bounce and noise. Keep the MAX1559's ground pin and the ground leads of the input and output capacitors less than 0.2in (5mm) apart. In addition, keep all connections to FB and LX as short as possible. In particular, external feedback resistors should be as close to FB as possible. To minimize output voltage ripple and to maximize output power and efficiency, use a ground plane and solder GND directly to the ground plane. Refer to the MAX1559 evaluation kit for a layout example.
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5-Output Power-Management IC For Low-Cost PDAs MAX1559
VIN FEEDBACK RESISTORS AVDD DAC VDOUT RD VREF 1.25V R1 i1 ERROR AMP CONTROL VOUT (LCD BIAS)
SIMPLIFIED DC-DC CONVERTER
iD R2
i2
MAX1559
Figure 4. Adjusting the Output Voltage with a DAC
Pin Configuration
TOP VIEW
ENLCD COR2 MAIN ENC2
Chip Information
PROCESS: BiCMOS TRANSISTOR COUNT: 1872
16
15
14
13
COR1 IN SDIG ENSD
1 2
12 LFB 11 SWIN
MAX1559
3 4 5 REF 6 RS 7 N.C. 8 GND 10 SW 9 LX
THIN QFN
______________________________________________________________________________________
13
5-Output Power-Management IC For Low-Cost PDAs MAX1559
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
PACKAGE OUTLINE 12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
PACKAGE OUTLINE 12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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